The standard design rules (max_transition, max_fanout, and max_capacitance) cannot account for all reliability issues in deep submicron technologies.A new design rule was introduced to model this behavior more accurately.
The standard design rules (max_transition, max_fanout, and max_capacitance) cannot account for all reliability issues in deep submicron technologies.A new design rule was introduced to model this behavior more accurately.
The cell degradation design rule allows a maximum capacitance constraint to be based on the transition times at the cell inputs. The max_capacitance design rule takes precedence over cell degradation. Cell degradation can either be specified by the library vendor in their standard cell library or explicitly by the end user on the design’s input ports.
By default, DC Ultra does not take into account cell degradation during optimization. To enable cell degradation analysis when using the set_cell_degradation command on design input ports, set the variable compile_fix_cell_degradation to true. If the cell degradation design rule is described in the library, you need to perform two steps. First, set compile_fix_cell_degradation to true, and second, use the set_ultra_optimization command described later in this document, to ensure you have a DC Ultra license. If you do not have a DC Ultra license during optimization, cell degradation design rules are ignored.